Digilent 410-249P-KIT Manual de usuario descargar pdf (Pagina 2)

JTAG-HS2™ Programming Cable for Xilinx® FPGAs

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In addition to supporting JTAG, the JTAG-HS2 also features two highly configurable serial peripheral interface (SPI)

ports that allow communication with virtually any SPI peripheral. Both SPI ports share the same pins and only one

port may be enabled at any given time (see Fig. 3). Table 1 summarizes the features supported by each port. The

HS2 supports SPI modes 0, 1, 2, and 3.

: 5V to 1.8V

USB2

Port

TMS

TDI

TDO

TCK

MOSI

MISO

SCK

SPI DeviceJTAG-HS2

GND

VDD (VREF)

GND

VIO

Port

Number

SPI Mode

Shift

LSB

First

Shift

MSB

First

Selectable

SCK

Frequency

Max SCK

Frequency

Min SCK

Frequency

Inter-byte

Delay

Yes

30 MHz

8 KHz

0 – 1000 µS

Yes

30 MHz

8 KHz

0 – 1000 µS

Yes

2.066 MHz

485 KHz

0 – 1000 µS

Yes

2.066 MHz

485 KHz

0 – 1000 µS

Yes

2.066 MHz

485 KHz

0 – 1000 µS

Yes

2.066 MHz

485 KHz

0 – 1000 µS

Figure 1. Diagram of signal voltages and connections.

Figure 3. JTAG-HS2 SPI Device Connections.

Figure 2. Xilinx JTAG headers.

Table 1. Features supported by each port.

1 2 3 4 5 6

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Digilent 410-249P-KIT Manual de usuario Pagina 2

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