FMC-CE Hardware User Guide UG-FMC-CE (v1.1) August 23, 2010
7 Signal Name Pin Voltage Description Audio DAC sync right G36 2.5V Marks start of data frame Table 7. Audio FMC Connections 8. There are 4 SMA audio
8 Leftmost PMOD connector (dual) Signal Name Pin Voltage Description PMOD-JA-1 H11 2.5V I/O PMOD-JA-2 H10 2.5V I/O PMOD-JA-3 H8 2.5V I/O PMOD-JA-4 H7
9 Signal Name Pin Voltage Description PMOD-JB-11 -- Gnd Ground PMOD-JB-12 -- -- 3.3V Power Table 10. Center PMOD FMC Connection Rightmost PMOD connect
10 Appendix A: UCF for SP605 # # User Constraint File for FMC-CE card when attached to a Xilinx SP605 # pin locations only! # # 2/19/2010 # # # Devi
11 # rosetta buttons (5) NET "button_pins<0>" LOC = "A2"; # CONN_BUT0 - center NET "button_pins<1>" LOC =
12 NET "AUX_JB<7>" LOC="H10"; NET "AUX_JB<8>" LOC="C4"; NET "AUX_JB<9>" LOC=
13 Appendix B: UCF for ML605 As there are two FMC connectors on the board: J63 and J64, there are two possible connections for each signal, depending
14 NET "LED_rosetta_pins<2>" LOC = "B33"; # CONN_BUT_LED2 - north NET "LED_rosetta_pins<3>" LOC = "D3
15 # Aux I/O 8 bit 2 x 4 connector JB NET "AUX_JB<1>" LOC="L25"; NET "AUX_JB<2>" LOC="H33"; NE
16 NET "LCD_data_pins<5>" LOC = "AN29"; NET "LCD_data_pins<6>" LOC = "AP29"; NET "LCD_data_
i Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the de
17 NET "ROTARY_ENC_A_pin" LOC="AK23" | IOSTANDARD = LVCMOS25; NET "ROTARY_ENC_B_pin" LOC="AM23" | IOS
18 Appendix C: VITA 57.1 FMC LPC (J63) and HPC (J64) Connector Pinout NET "FMC_HPC_CLK0_M2C_N" LOC = "K23"; ## H5
19 NET "FMC_HPC_DP7_M2C_N" LOC = "AP6"; ## B13 on J64 NET "FMC_HPC_DP7_M2C_P" LOC = "AP5
20 NET "FMC_HPC_HA19_N" LOC = "U32"; ## F20 on J64 NET "FMC_HPC_HA19_P" LOC = "U33
21 NET "FMC_HPC_HB17_CC_N" LOC = "AG28"; ## K38 on J64 NET "FMC_HPC_HB17_CC_P" LOC = "AG2
22 NET "FMC_HPC_LA19_N" LOC = "AN24"; ## H23 on J64 NET "FMC_HPC_LA19_P" LOC = "AN2
23 NET "FMC_LPC_IIC_SCL_LS" LOC = "AF13"; ## 2 of Q26 NET "FMC_LPC_IIC_SDA_LS" LOC = "AG1
24 NET "FMC_LPC_LA21_N" LOC = "T26"; ## H26 on J63 NET "FMC_LPC_LA21_P" LOC = "R26
ii Contents About This Guide ...
1 About This Guide The purpose is of this document is to convey the necessary information to the designer to successfully use the capabilities of the
2 4) Rosetta pattern of 5 LEDs, co-located with the push button switches 5) A Rotary/push-button switch 6) An LCD display (2x16). 7) Headphone jac
3 Figure 3. Schematic of LEDs for Both the Linear Array and Rosetta Array Signal Name Pin Voltage Description LED linear 0 D27 any Voltage must be s
4 3. The 5 buttons are pulled to GND through a 10K resistor and pulled up to 2.5 V when pressed. When not pressed the button is pulled up to 2.5V. A
5 Signal Name Pin Voltage Description LED Rosetta 1 G16 any West LED Rosetta 2 G19 any North LED Rosetta 3 H17 any East LED Rosetta 4 G13 any South Ta
6 Signal Name Pin Voltage Description LCD Data 3 G24 2.5V As above LCD Data 4 G25 2.5V Four high order bi-directional tristate data bus pins. Used for
Comentarios a estos manuales